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[PATCH V4 0/5] x86/mbm : Intel Memory Bandwidth monitoring support

The V4 version of MBM is almost a complete rewrite of the prior versions. It tries to address all of Thomas earlier comments. The patch series has on

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[PATCH 1/5] x86,perf/cqm : Fix cqm handling of grouping events into a...

Currently cqm(cache quality of service monitoring) is grouping all events belonging to same PID to use one RMID. However its not counting all of these

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[PATCH 2/5] x86/mbm: Intel Memory B/W Monitoring enumeration and init

The MBM init patch enumerates the Intel (Memory b/w monitoring)MBM and initializes the perf events and datastructures for monitoring the memory b/w. I

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[PATCH 3/5] x86/mbm: Memory bandwidth monitoring event management

From: Tony Luck<tony.luck@intel.com> Includes all the core infrastructure to measure the total_bytes and bandwidth. We have per socket counters for

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[PATCH 4/5] x86/mbm: RMID Recycling MBM changes

RMID could be allocated or deallocated as part of RMID recycling. When an RMID is allocated for mbm event, the mbm counter needs to be initialized bec

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[PATCH 5/5] x86/mbm: Add support for MBM counter overflow handling

This patch adds a per package timer which periodically updates the Memory bandwidth counters for the events that are currently active. Current patch h

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[PATCH 0/4 v6] sched,time: reduce nohz_full syscall overhead 40%

(v6: make VIRT_CPU_ACCOUNTING_GEN jiffy granularity) Running with nohz_full introduces a fair amount of overhead. Specifically, various things that a

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[PATCH 4/4] sched,time: switch VIRT_CPU_ACCOUNTING_GEN to jiffy granularity

From: Rik van Riel <riel@redhat.com> After removing __acct_update_integrals from the profile, native_sched_clock remains as the top CPU user. This ca

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[PATCH] cpufreq: Avoid unnecessary locking in show() and store()

From: Rafael J. Wysocki <rafael.j.wysocki@intel.com> The show() and store() routines in the cpufreq core don't need to acquire all of the locks to ch

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[PATCH v2 0/7] ibmvscsi code cleanup

Fixed up a couple spots that were out of line with the PAPR in regards to its defined VSCSI protocol. Did away with some magic numbers directly in the

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[PATCH v2 1/7] ibmvscsi: Correct values for several viosrp_crq_format enums

The enum values for VIOSRP_LINUX_FORMAT and VIOSRP_INLINE_FORMAT are off by one. They are currently defined as 0x06 and 0x07 respetively. These values

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[PATCH v2 2/7] ibmvscsi: Add and use enums for valid CRQ header values

The PAPR defines four valid header values for the first byte of a CRQ message. Namely, an unused/empty message (0x00), a valid command/response entry

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[PATCH v2 3/7] ibmvscsi: Replace magic values in set_adpater_info() with defines

Add defines for mad version and mad os_type, and replace the magic numbers in set_adapter_info() accordingly. Signed-off-by: Tyrel Datwyler <tyreld@l

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[PATCH v2 4/7] ibmvscsi: Use of_root to access OF device tree root node

The root node of the OF device tree is exported as of_root. No need to look up the root by path name. Instead just get a reference directly via of_roo

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[PATCH v2 5/7] ibmvscsi: Remove unsupported host config MAD

A VIOSRP_HOST_CONFIG_TYPE management datagram (MAD) has existed in the code for some time. From what information I've gathered from Brian King this wa

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[PATCH v2 6/7] ibmvscsi: Add endian conversions to sysfs attribute show...

The values returned by the show functions for the host os_type, mad_version, and partition_number attributes get their values directly from the madapt

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[PATCH v2 7/7] ibmvscsi: use H_CLOSED instead of magic number

In a couple places the magic value of 2 is used to check the return code of hypercalls. This translates to H_CLOSED. Signed-off-by: Tyrel Datwyler <t

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[PATCH] ARM: imx_v6_v7_defconfig: enable useful configurations for Vybrid

Enable configuration options useful for Vybrid: - NFC NAND driver - USB dual-role controller support - FTM PWM driver - DSPI SPI driver - Colibri VF50

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[PATCH] ARM: multi_v7_defconfig: enable useful configurations for Vybrid

Enable configuration options useful for Vybrid: - NFC NAND driver - USB dual-role controller (and Chipidea Gadget support) - Built-in EDMA DMA driver

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[PATCH] mm: fix pfn_t vs highmem

The pfn_t type uses an unsigned long to store a pfn + flags value. On a 64-bit platform the upper 12 bits of an unsigned long are never used for stor

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