[PATCH v4 17/23] arm64: KVM: VHE: Add fpsimd enabling on guest access
Despite the fact that a VHE enabled kernel runs at EL2, it uses CPACR_EL1 to trap FPSIMD access. Add the required alternative code to re-enable guest
View Article[PATCH v4 18/23] arm64: KVM: VHE: Add alternative panic handling
As the kernel fully runs in HYP when VHE is enabled, we can directly branch to the kernel's panic() implementation, and not perform an exception retur
View Article[PATCH v4 19/23] arm64: KVM: Move most of the fault decoding to C
The fault decoding process (including computing the IPA in the case of a permission fault) would be much better done in C code, as we have a reasonabl
View Article[PATCH v4 20/23] arm64: perf: Count EL2 events if the kernel is running in HYP
When the kernel is running in HYP (with VHE), it is necessary to include EL2 events if the user requests counting kernel or hypervisor events. Review
View Article[PATCH v4 21/23] arm64: hw_breakpoint: Allow EL2 breakpoints if running in HYP
With VHE, we place kernel {watch,break}-points at EL2 to get things like kgdb and "perf -e mem:..." working. This requires a bit of repainting in the
View Article[PATCH v4 22/23] arm64: VHE: Add support for running Linux in EL2 mode
With ARMv8.1 VHE, the architecture is able to (almost) transparently run the kernel at EL2, despite being written for EL1. This patch takes care of t
View Article[PATCH v4 23/23] arm64: Panic when VHE and non VHE CPUs coexist
Having both VHE and non-VHE capable CPUs in the same system is likely to be a recipe for disaster. If the boot CPU has VHE, but a secondary is not, w
View Article[PATCH v5 0/3] Adding NPS400 drivers
From: Noam Camus <noamc@ezchip.com> Change Log-- v5: Clocksource, irqchip - Fix gracefull return. replace call to pan
View Article[PATCH v5 1/3] soc: Support for EZchip SoC
From: Noam Camus <noamc@ezchip.com> This header file is for NPS400 SoC. It includes macros for accessing memory mapped registers. These are functiona
View Article[PATCH v5 2/3] clocksource: Add NPS400 timers driver
From: Noam Camus <noamc@ezchip.com> Add internal tick generator which is shared by all cores. Each cluster of cores view it through dedicated address
View Article[PATCH v5 3/3] irqchip: add nps Internal and external irqchips
From: Noam Camus <noamc@ezchip.com> Adding EZchip NPS400 support. NPS internal interrupts are internally handled at Multi Thread Manager (MTM) that i
View ArticleWARNING: CPU: 0 PID: 3031 at ./arch/x86/include/asm/fpu/internal.h:530...
Hey Andy, can you make any sense of this: [ 90.573923] ------------[ cut here ]------------ [ 90.574977] WARNING: CPU: 0 PID: 3031 at ./arch/x86
View Article[PATCH v1] tty: serial: 8250: Fix possible race in serial8250_em485_destroy()
Fix possbile race in serial8250_em485_destroy() when timer handlers can dereference p->em485 which is alread destroyed but not yet NULLed. Signed-off
View Article[PATCH net] af_unix: Guard against other == sk in unix_dgram_sendmsg
The unix_dgram_sendmsg routine use the following test if (unlikely(unix_peer(other) != sk && unix_recvq_full(other))) { to determine if sk and other
View Articlepatch to fix small grammar error
Hello, I have a small patch to the memory-hotplug documentation. One line adds a comma, and the other line adds an and. Justin Keller --- Documentat
View ArticleRe: rwsem exit_to_usermode
On 02/10, Andy Lutomirski wrote: > > On Wed, Feb 10, 2016 at 5:05 PM, Justin Capella <justincapella@gmail.com> wrote: > > http://i.imgur.com/gKamNV3.j
View Article[RFC PATCH] perf hists: Do column alignment on the format iterator
We were doing column alignment in the format function for each cell, returning a string padded with spaces so that when the next column is printed the
View Article[PATCH v42 0/6] critical clocks and handoff clocks
This series combines Lee's critical clock patches[0] plus some small fixes and changes with a repost of my handoff clock patches[1]. Both features are
View Article[PATCH v42 1/6] clk: Allow clocks to be marked as CRITICAL
From: Lee Jones <lee.jones@linaro.org> Critical clocks are those which must not be gated, else undefined or catastrophic failure would occur. Here w
View Article[PATCH v42 2/6] clk: WARN_ON about to disable a critical clock
From: Lee Jones <lee.jones@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Michael Turquette <mturquette@baylibre.com> ---
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